Sasao Tsutomu | The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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概要
- SASAO Tsutomuの詳細を見る
- 同名の論文著者
- The Department Of Computer Science And Electronics Kyushu Institute Of Technologyの論文著者
関連著者
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Sasao Tsutomu
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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SASAO Tsutomu
Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
Department of Computer Science, Meiji University
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Hasan Babu
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Sasao T
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Iguchi Y
Department Of Computer Science Meiji University
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IGUCHI Yukihiro
the Department of Computer Science, Meiji University
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Debnath Debatosh
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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MATSUURA Munehiro
Department of Computer Science and Electronics, Kyushu Institute of Technology
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Debnath D
Oakland Univ. Michigan Usa
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DEBNATH Debatosh
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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MATSUURA Munehiro
Kyushu Institute of Technology
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QIN Hui
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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MATSUURA Munehiro
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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Qin Hui
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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HASAN BABU
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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SASAO Tsutomu
the Department of Computer Science and Electronics, Kyushu Institute of Technology
著作論文
- Generalized Reed-Muller Expressions: Complexity and an Exact Minimization Algorithm (Special Section on VLSI Design and CAD Algorithms)
- Shared Multi-Terminal Binary Decision Diagrams for Multiple-Output Functions (Special Section on VLSI Design and CAD Algorithms)
- Heuristics to Minimize Multiple-Valued Decision Diagrams (Special Section on VLSI Design and CAD Algorithms)
- A Design of AES Encryption Circuit with 128-bit Keys Using Look-Up Table Ring on FPGA(Computer Components)
- On Properties of Kleene TDDs(Special Issue on Test and Diagnosis of VLSI)
- Minimization of AND-OR-EXOR Three-Level Networks with AND Gate Sharing (Special Issue on Synthesis and Verification of Hardware Design)