Minimization of AND-OR-EXOR Three-Level Networks with AND Gate Sharing (Special Issue on Synthesis and Verification of Hardware Design)

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概要

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• This paper presents an exact minimization algorithm for AND-OR-EXOR three-level networks, where a single two-input exclusive-OR (EXOR) gate is used. The network realizes an EXOR of two sum-of-products expressions (EX-SOP), where the two sum-of-products expressions (SOP) can share products. The objective is to minimize the total number of different products in the two SOPs. An algorithm for the exact minimization of EX-SOPs with up to five variables are shown. Up to five variables, EX-SOPs for all the representative functions of NP-equivalence classes were minimized. For five-variable functions, we confirmed that minimum EX-SOPs require up to 9 products. For n-variable functions, minimum EX-SOPs require at most 9・2^<n-5>(n≧6) products.

• 社団法人電子情報通信学会の論文
• 1997-10-25

著者

• Debnath D

  Oakland Univ. Michigan Usa

• Sasao Tsutomu

  The Department Of Computer Science And Electronics Kyushu Institute Of Technology

• Debnath Debatosh

  The Department Of Computer Science And Electronics Kyushu Institute Of Technology

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