Characterization of Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS) Structures Using (Bi, La)_4Ti_3O_<12> and HfO_2 Buffer Layers
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概要
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We report the electrical properties of metal-ferroelectric-metal-insulator-semiconductor (MFMIS) struc lures using (Bi, La)_4Ti_3O_<12> (BLT) thin films with HfO_2 buffer layers for one-transistor(lT)-type FeRAM applications. Since high- capacitance buffer layers are required to realize the high density of MFMIS gate structures, we used a HfO_2 layer as an insulator material. Ferroelectric BLT layers were fabricated by the sol-gel technique and HfO_2 buffer layers were deposited by the RF sputtering method. It is demonstrated that Pt/HfO_2/n-Si MIS stmctures have a low leakage current in the l0^<-9>A/cm^2 range with an equivalent oxide thickness (EOT) of 3.5 nm. The capacitance-voltage (C-V) characteristics of the PT/BLT/Pt/HfO_2/n-Si MFMIS diode with an SI/SF area ratio of 6 reveal a large memory window of 3 V due to the ferroelectric properties of the BLT films.
- 社団法人応用物理学会の論文
- 2002-11-30
著者
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Tokumitsu Eisuke
Precision And Intelligence Laboratory; Tokyo Institute Of Technology
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Tokumitsu Eisuke
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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SUZUKI Takuya
Precision and Intelligence Laboratory; Tokyo Institute of Technology
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Tokumitsu Eisuke
Precision & Intelligence Laboratory, Tokyo Institute of Technology,
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