Characteristics of a Stabilized Pulsed Plasma via Suppression of Side-Band Modes
スポンサーリンク
概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1997-04-30
著者
-
Lee Moon
Samsung Electronics Co. Semiconductor R&d Center Memory Process Development Team
-
Jung C
Semiconductor R&d Samsung Electronics Co. Ltd.
-
Lee M
Samsung Electronics Co. Ltd. Kyungki‐do Kor
-
Lee Moon
Semiconductor R&d Center Samsung Electronics Co. Ltd
-
JUNG Chan
Semiconductor R&D Center, Samsung Electronics Co.Ltd.
-
KOH Young
Semiconductor R&D Center, Samsung Electronics Co.Ltd.
-
Hahm J
Semiconductor R&d Samsung Electronics Co. Ltd.
-
Lee Moon
Semiconductor R&d Samsung Electronics Co. Ltd.
-
CHI Kyeong
Semiconductor R&D Samsumg Electronics Co., Ltd.
-
HAHM Jin
Semiconductor R&D, Samsung Electronics Co., Ltd.
-
Koh Y
Semiconductor R&d Center Samsung Electronics Co.ltd.
-
Chi K
Semiconductor R&d Samsumg Electronics Co. Ltd.
-
Koh Young
Semiconductor R&d Center Samsung Electronics Co. Ltd.
-
JUNG Chan
Semiconductor R&D Samsung Electronics Co., Ltd.
-
Chi Kyeong
Semiconductor R&D Samsumg Electronics Co., Ltd.
-
HAHM Jin
Semiconductor R&D, Samsung Electronics Co., Ltd.
-
KOH Young
Semiconductor R & D Center, Samsung Electronics Co., Ltd
関連論文
- Heterogeneous Particle Formation during Low Pressure Etching of Silicon Dioxide
- Back-end Integration of Pt/BST/Pt Capacitor for ULSI DRAM Applications
- Back-end Integration of Pt/BST/Pt Capacitor for ULSI DRAM Applications
- Deposition Characteristics of (Ba, Sr)TiO_3 Thin Films by Liquid Source Metal-Organic Chemical Vapor Deposition at Low Substrate Temperatures
- Variation of Electrical Conduction Phenomena of Pt/(Ba, Sr)TiO_3/Pt Capacitors by Different Top Electrode Formation Processes
- A Process Integration of (Ba, Sr) TiO_3 Capacitor into 256M DRAM
- Remote Plasma-Assisted Metal Organic Chemical Vapor Deposition of Tantalum Nitride Thin Films with Different Radicals
- Barrier Metal Properties of Amorphous Tantalum Nitride Thin Films between Platinum and Silicon deposited using Remote Plasma Metal Organic Chemical Vapor Method
- A New, Low-Thermal-Budget Planarization Scheme for Pre-Metal Dielectric Using Electron-Beam Cured Hydrogen Silsesquioxane in Device
- A Novel and Low Thermal Budget Planarization Scheme for Pre-Metal Dielectric Using Electron-Beam Cured HSQ (Hydrogen Silsesquioxane) in STC (Stacked Capacitor) DRAM
- Cleaning Method using H_2O_2 Buffing after Selective Silicon CMP
- Cleaning Method using H_2O_2 Buffing after Selective Silicon CMP
- Fabrication and Electrical Characterization of Pt/(Ba, Sr)TiO_3/Pt Capacitors for Ultralarge-Scale Integrated Dynamic Random Access Memory Applications
- Enhancement of Mask Selectivity in SiO_2 Etching with a Phase-Controlled Pulsed Inductively Coupled Plasma
- Characteristics of a Stabilized Pulsed Plasma via Suppression of Side-Band Modes
- Effect of SiO_2 Film Deposition on the Ferroelectric Properties of a Pt/Pb(Zr,Ti)O_3/Pt Capacitor
- Effect of ECR CVD SiO_2 Film Deposition of Ferroelectric Properties of Pt/PZT/Pt Capacitor
- Low Damage In Situ Contact Cleaning Method by a Highly Dense and Directional ECR Plasma
- Preparation and Electrical Properties of SrTiO3 Thin Films Deposited by Liquid Source Metal-Organic Chemical Vapor Deposition (MOCVD)
- Deposition and Electrical Characterization of Very Thin SrTiO_3 Films for Ultra Large Scale Integrated Dynamic Random Access Memory Application
- Electrical Characterizations of Pt/(Ba,Sr)TiO_3/Pt Planar Capacitors for ULSI DRAM Applications
- Degradation and Recovery in the Ferroelectric Properties of Pt/Pb(Zr,Ti)O_3/Pt capacitor caused by SiO_2 Film Deposition
- Degradation and Recovery in the Ferroelectric Properties of Pt/Pb(Zr,Ti)O_3/Pt capacitor caused by SiO_2 Film Deposition
- Structural and Electrical Properties of Ba_Sr_TiO_3 Films on Ir and IrO_2 Electrodes
- Preparation and Characterization of Iridium Oxide Thin Films Grown by DC Reactive Sputtering
- Improvement of Photo-Misalignment in Patterned Wafer Bonding Process for Silicon-on-Insulator Device
- A Novel LOCOS-Trench Combination Isolation Method for Maximum Chemical Mechanical Polishing(CMP) Process Window
- Design Considerations for Patterned Wafer Bonding