An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET

概要

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An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage V_<ds>(t) and drain-source current I_<ds>(t) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous V_<ds>(t) and I_<ds>(t). Output power (P_<out>), power added efficiency (η_<add>), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (g_m), drain-source resistance (R_<ds>), gate-source capacitance (C_<gs>), and gate leak resistance (R_<ig>) contribute to positive or negative phase deviations. The difference between small-signal and large-signal S-parameters (S_<11>, S_<12>, S_<21>, S_<22>) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.
社団法人電子情報通信学会の論文
2001-07-01