A 4-12 GHz 2 W GaAs HFET Amplifier Using Pre-Matching Circuits for Dual Gate-Bias Feed and Tapered Power Splitting/Combining FETs(Special Issue on Low-Distortion, High-Power, High-Efficiency Active Device and Circuit Technology)

概要

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A 4-12GHz 2W GaAs HFET amplifier has been developed. It employs two novel circuit design techniques. One is a pre-matching circuit for dual gate-bias feed. It is comprised of two shunt LCR circuits, which makes dual gate-bias feed possible. The other one is a tapered power splitting/combining FET (tapered PS/PC FET), which makes amplitude and phase imbalance between FET cells small over a wide bandwidth. In this paper, the schematic diagram and impedance characteristic of the pre-matching circuit for dual gate-bias feed are described first, showing the conditions that the impedance of FETs becomes purely resistive. Then the amplitude and phase imbalance between FET cells are compared by electromagnetic simulation for both the conventional and tapered PS/PC FETs, demonstrating that the tapered PS/PC FET has smaller amplitude and phase imbalance. Furthermore, the MSG/MAG are compared by experiment for both FETs, confirming that the tapered PS/PC FET has higher MSG/MAG. Finally, the design, fabrication, and performance of the 4-12GHz 2W GaAs HFET amplifier using the pre-matching circuit for dual gate-bias feed and tapered PS/PC FETs are presented to make sure that two novel circuit design techniques introduced in this paper are useful for the design of wideband lossy match power amplifiers.
社団法人電子情報通信学会の論文
2002-12-01