2 V/12O ns Embedded Flash EEPROM Circuit Technology (Special Issue on ULSI Memory Technology)
スポンサーリンク
概要
- 論文の詳細を見る
A 2 V/120 ns flash EEPROM embedded in a microcontroller has been fabricated in 0.8μm double-metal CMOS process technology with a simple stacked gate memory cell. To achieve low voltage and high speed operation, novel circuit technology and architecture; (a) PMOS-precharging NMOS-self-boost word line circuit with a higher voltage selector,(b) new erase algorithm for reverse operation, (c) column gate boost circuit, (d) hard-verify mode for replacing weak cells, (e) efficient redundancy of row and column lines, have been developed. A 512 kb flash EEPROM core chip incorporating these circuit techniques and architecture operate at 1.8 V and accesses data in 120 ns at 2 V and 70℃.
- 社団法人電子情報通信学会の論文
- 1996-06-25
著者
-
本田 雄士
日本電気(株)システムデバイス研究所
-
本田 雄士
Nec基礎研究所
-
CHAYA Shigeo
The authors are with ULSI Process Technology Development Center, Matsushita Electronics Corporation
-
SUMI Tatsumi
Kyoto Research Laboratory, Matsushita Electronics Corporation
-
SUMI Tadashi
the System LSI Laboratory, Mitsubishi Electric Corporation
-
Fukumoto Takahiro
Kyoto Researcgh Laboratory Matsushita Electronics Corporation
-
Honda T
System Devices Research Laboratories Nec Corporation
-
HIRANO Hiroshige
Kyoto Researcgh Laboratory, Matsushita Electronics Corporation
-
HONDA Toshiyuki
Kyoto Researcgh Laboratory, Matsushita Electronics Corporation
-
CHAYA Shigeo
Kyoto Researcgh Laboratory, Matsushita Electronics Corporation
-
Sumi T
The Authors Are With Electronics Research Laboratory Matsushita Electronics Corporation
-
Sumi Tatsumi
Kyoto Research Laboratory Matsushita Electronics Corporation
-
Chaya Shigeo
The Authors Are With Ulsi Process Technology Development Center Matsushita Electronics Corporation
-
Honda T
Fukuoka Univ. Fukuoka Jpn
-
Hirano Hiroshige
The Authors Are With Ulsi Process Technology Development Center Matsushita Electronics Corporation
関連論文
- 4MbMRAMとその応用(新メモリ技術とシステムLSI)
- 4Mb-MRAMのインテグレーション技術
- 512KbクロスポイントセルMRAM(MRAM,不揮発メモリ,メモリ,一般)
- A Design of High-Speed 4-2 Compressor for Fast Multiplier (Special Issue on Ultra-High-Speed LSIs)
- 24pYQ-9 ナノスケール磁性体の磁気特性における温度依存性
- Ferroelectric Memory Circuit Technology and the Application to Contactless IC Card(Special Issue on Advanced Memory Devices Using High-ε and Ferroelectric Films)
- Retention Characteristics of a Ferroelectric Memory Based on SrBi_2(Ta, Nb)_2O_9
- Ferroelectric Nonvolatile Memory Technology and Its Applications
- A 286 MHz 64-b Floating Point Multiplier with Enhanced CG Operation
- A 2.6-ns 64-b Fast and Small CMOS Adder (Special Issue on Ultra-High-Speed LSIs)
- 29p-J-4 ナノスケール磁性体の磁気特性 II
- 26p-YJ-1 ナノスケール磁性体における磁気特性
- MRAM Applications Using Unlimited Write Endurance(Next-Generation Memory for SoC,VLSI Technology toward Frontiers of New Market)
- Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode(Integrated Electronics)
- MRAM Writing Circuitry to Compensate for Thermal Variation of Magnetization Reversal Current
- 2 V/12O ns Embedded Flash EEPROM Circuit Technology (Special Issue on ULSI Memory Technology)
- Stability of Steady Flow in Collapsible Tubes
- Static Linearity Error Analysis of Subranging A/D Converters (Special Section on Analog Technologies in Submicron Era)
- A 350-MS/s 3.3-V 8-bit CMOS D/A Converter Using a Delayed Driving Scheme (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
- A Chip Set for Programmable Real-Time MPEG2 MP@ML Video Encoder(Special Issue on Multimedia, Network, and DRAM LSIs)
- Ferroelectric Nonvolatile Memory Technology (Special Issue on ULSI Memory Technology)
- Ferroelectric Nonvolatile Memory Technology and Its Applications
- Reliable Sexing of Human Preimplantation Embryos : Analysis by DNA Amplification and Fluorescence in situ Hybridization
- Ferroelectric Nonvolatile Memory Technology and Its Applications