Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches
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概要
- 論文の詳細を見る
In order for the interconnect effects due to process-induced variations to be applied to the designs in 0.13μm and below, it is necessary to determine and characterize the realistic interconnect worstcase models with high accuracy and speed. This paper proposes new statistically-based approaches to the characterization of realistic interconnect worstcase models which take into account process-induced variations. The Effective Common Geometry (ECG) and Accumulated Maximum Probability (AMP) algorithms have been developed and implemented into the new statistical interconnect worstcase design environment. To verify this statistical interconnect worstcase design environment, the 31-stage ring oscillators are fabricated and measured with UMC 0.13μm Logic process. The 15-stage ring oscillators are fabricated and measured with 0.18μm standard CMOS process for investigating its flexibility in other technologies. The results show that the relative errors of the new method are less than 1.00%, which is two times more accurate than the conventional worstcase method. Furthermore, the new interconnect worstcase design environment improves optimization speed by 29.61-32.01% compared to that of the conventional worstcase optimization. The new statistical interconnect worstcase design environment accurately predicts the worstcase and bestcase corners of non-normal distribution where conventional methods cannot do well.
- （社）電子情報通信学会の論文
- 2008-04-01
著者
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Jung Won‐young
Device Engineering Team Dongbu Hitek Co. Ltd.
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Jung Won-young
Technical Engineering Center Dongbu Hitek
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Jung Won‐young
Soongsil Univ. Seoul Kor
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Jung Won-young
School Of Electronic Engineering Soongsil University:(present Office)r & D Nanno Solutions Inc.
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Wee Jae-kyung
School Of Electronic Engineering Soongsil University
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Jung Won-young
School Of Electronic Engineering Soongsil University
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KIM Yong-Ju
Memory Research & Development Division, Hynix Semiconductor Inc.
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KIM Hyungon
Nanno Solutions, Inc.
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Kim Hyungon
Nanno Solutions Inc.
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Kim Yong-ju
Memory R&d Center Hynix
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WEE Jae-Kyung
School of Electronic Engineering, Soongsil University
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KIM Yong-Ju
Memory R&D Center
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