Power Distribution Network Design Using Network Synthesis in High-Speed Digital Systems(Microwaves, Millimeter-Waves)
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概要
- 論文の詳細を見る
This letter presents a novel method to design a power distribution network with highly accurate impedance characteristic. Based on the PBEC (path-based equivalent circuit) model and the network synthesis, the proposed design method exploits simple arithmetic expressions to calculate the electrical parameters of a power distribution network. It directly calculates and determines the size of on-chip decoupling capacitors, the size and location of off-chip decoupling capacitors, and the effective inductances of the package power bus. To evaluate the accuracy of the proposed method, it was applied to a test board with size of 12.5 cm×12.5 cm and with plane-to-plane distance of 200μm. The proposed method successfully designed a power distribution network keeping its impedance characteristic under 1 Ω with frequency range of 100 kHz-1 GHz. The proposed design method requires negligible computation when compared with conventional PEEC (partial elements equivalent circuit) model-based design approaches, but the simulation results of both methods are almost identical. Consequently, the proposed method enables simple, fast and accurate design of power-distribution networks, which gives economic and practical solutions for commercial tools.
- 社団法人電子情報通信学会の論文
- 2004-11-01
著者
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Wee J‐k
Hynix Semiconductor Icheon Kor
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Wee Jae-kyung
School Of Electronic Engineering Soongsil University
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Kim Y‐j
Memory Research & Development Division Hynix Semiconductor Inc.
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KIM Yong-Ju
Memory Research & Development Division, Hynix Semiconductor Inc.
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LEE Seongsoo
School of Electronic Engineering, Soongsil University
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Kim Yong-ju
Memory Research & Development Division Hynix Semiconductor Inc.
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Kim Yong-ju
Department Of Eecs Korea Advanced Institute Of Science And Technology
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Kim Yong-ju
Memory R&d Center Hynix
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Lee Seongsoo
School Of Electronic Engineering Soongsil University
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KIM Yong-Ju
Memory R&D Center
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