A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique

スポンサーリンク

概要

• 論文の詳細を見る

• We suggest a novel digitally-controlled SMPS using a high-resolution DPWM generator. In the proposed circuit, the duty ratio of the DPWM is determined by the voltage slope control of an internal capacitor using a pseudo relaxation-oscillation technique. This new control method has a simpler structure, and consumes less power compared to a conventional digitally-controlled SMPS. Therefore, the proposed circuit is able to operate at a high switching frequency (1MHz∼10MHz) obtained from a relatively low internal operating frequency (10MHz∼100MHz) with a small area. The maximum current of the core circuit is 2.7mA, and the total current of the entire circuit, including the output buffer driver, is 15mA at 10MHz switching frequency. The proposed circuit is designed to supply a maximum 1A with maximum DPWM duty ratio of 90%. The output voltage ripple is 7mV at 3.3V output voltage. To verify the operation of the proposed circuit, we performed a simulation with Dongbu Hitek BCD 0.35µm technology.

著者

• Lim Ji-hoon

  School Of Electronic Engineering Soongsil University

• Wee Jae-kyung

  School Of Electronic Engineering Soongsil University

• KIM Yong-Ju

  Memory R&D Center

• SONG Inchae

  School of Electronic Engineering, Soongsil University

• JUNG Won-Young

  Dongbu Hitek Ltd.

関連論文

• Measurement-Based Line Parameter Extraction Method for Multiple-Coupled Lines in Printed Circuit Boards(Special Issue on Microwave and Millimeter Wave Technology)
• Power Distribution Network Design Using Network Synthesis in High-Speed Digital Systems(Microwaves, Millimeter-Waves)
• Pipelined Wake-Up Scheme to Reduce Power Line Noise for Block-Wise Shutdown of Low-Power VLSI Systems(Low-Power System LSI, IP and Related Technologies)
• Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches
• A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips(Electronic Circuits)
• Fast and Accurate Power Bus Designer for Multi-Layers High-Speed Digital Boards(Integrated Electronics)
• Low-Hardware-Cost Motion Estimation with Large Search Range for VLSI Multimedia Processors(Image Processing and Video Processing)
• Error Correcting 4/6 Modulation Codes for Holographic Data Storage
• A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique
• A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique

スポンサーリンク