A Physical-Based Modeling for Accurate Wide-Width LDMOS(Session 7B : Si IC and Circuit Technology)

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概要

• 論文の詳細を見る

• This paper presents a new robust modeling method for a wide width LDMOS to improve the accuracy and the simulation speed. For this, we have developed physical-based model with reduced order lumped model technique. To verify the method, the 40 V low side nLDMOS was fabricated with 0.35 m BCD process and measured for Ron which is the most important characteristic in power devices. The proposed method shows within +/-10 % relative error compared to measurements for various widths and much faster than previous method. SPICE simulation time compared to previous RCX-based modeling method shows much faster speed. In conclusion, a designer can quickly get the simulation results with accurate LDMOS macro-model while considering the effect of resistance due to parasitic routing metal in pre-simulation stage.

• 2010-06-23

著者

• JUNG Won-Young

  Technical Engineering Center, Dongbu HiTek

• KIM Jin-Soo

  Technical Engineering Center, Dongbu HiTek

• KIM Taek-Soo

  Technical Engineering Center, Dongbu HiTek

• LEE Jong-Sub

  Technical Engineering Center, Dongbu HiTek

• LEE Eun-Jin

  Technical Engineering Center, Dongbu HiTek

• PARK Ki-Jung

  Technical Engineering Center, Dongbu HiTek

• KWAK Sang-Hun

  Technical Engineering Center, Dongbu HiTek

• Kim Jong-min

  Technical Engineering Center Dongbu Hitek

• Jung Won‐young

  Device Engineering Team Dongbu Hitek Co. Ltd.

• Jung Won-young

  Technical Engineering Center Dongbu Hitek

• Jung Won‐young

  Soongsil Univ. Seoul Kor

• Kim Jin-soo

  Technical Center Daewoo Motor Co.

• Lee Eun-jin

  Technical Engineering Center Dongbu Hitek

• Park Ki-jung

  Technical Engineering Center Dongbu Hitek

• Lee Jong-sub

  Technical Engineering Center Dongbu Hitek

• Kim Taek-soo

  Technical Engineering Center Dongbu Hitek

• Kwak Sang-hun

  Technical Engineering Center Dongbu Hitek

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