Low temperature divided CVD technique for TiN metal gate electrodes of p-MISFETs
スポンサーリンク
概要
- 論文の詳細を見る
- 2005-09-13
著者
-
MORI Kenichi
Process Technology Development Division Renesas Technology Corporation
-
INOUE Masao
Process Development Dept., Wafer Process Engineering Development Div., LSI Manufacturing Unit, Renes
-
YONEDA Masahiro
Process Technology Development Division, Renesas Technology Corp.
-
YUGAMI Jiro
Process Technology Development Div., Renesas Technology Corp.
-
Miyatake Hiroshi
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Mori Kenichi
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Mizutani Masaharu
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Yugami Jiro
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
SAKASHITA Shinsuke
Process Development Dept., Process Technology Development Div., Production and Technology Unit, Rene
-
TANAKA Kazuki
Process Engineering Section, Wafer Process Engineering Dept., Renesas Semiconductor Engineering Corp
-
YAMANARI Shinichi
Process Development Dept., Process Technology Development Div., Production and Technology Unit, Rene
-
Tanaka Kazuki
Process Engineering Section Wafer Process Engineering Dept. Renesas Semiconductor Engineering Corpor
-
Yamanari Shinichi
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Sakashita Shinsuke
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Sakashita Shinsuke
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Yoneda Masahiro
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Yoneda Masahiro
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Inoue Masao
Process Development Dept. Process Technology Development Div. Production And Technology Unit Renesas
-
Sakashita Shinsuke
Process Development Department, Process Technology Development Division, Production and Technology Unit, Renesas Technology Corporation
-
YONEDA Masahiro
Process Development Department, Process Technology Development Division, Production and Technology Unit, Renesas Technology Corporation
-
Inoue Masao
Process Development Department, Process Technology Development Division, Production and Technology Unit, RENESAS Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
-
Yoneda Masahiro
Process Development Department, Process Technology Development Division, Production and Technology Unit, Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
関連論文
- Effects of Dielectric-Layer Composition on Growth of Self-Formed Ti-Rich Barrier Layers in Cu(1at% Ti)/Low-k Samples
- Control of nitrogen profile in radical nitridation of SiO_2 films
- Local Bonding Structure of High-Stress Silicon Nitride Film modified by UV Curing for Strained-Silicon Technology beyond 45nm Node SoC Devices
- Study of Stress from Discontinuous SiN Liner for Fully-Silicided Gate Process
- Low temperature divided CVD technique for TiN metal gate electrodes of p-MISFETs
- A New Divided Deposition Method of TiN Thin Films for MIM Capacitor Applications
- Structure Analyses of Ti-Based Self-Formed Barrier Layers
- Investigation of the Divided Deposition Method of TiN Thin Films for Metal–Insulator–Metal Capacitor Applications
- Diffusion Control Techniques for TiN Stacked Metal Gate Electrodes for p-Type Metal Insulator Semiconductor Field Effect Transistors
- Control of Nitrogen Depth Profile near Silicon Oxynitride/Si(100) Interface Formed by Radical Nitridation
- Control of Nitrogen Depth Profile and Chemical Bonding State in Silicon Oxynitride Films Formed by Radical Nitridation
- Effect of N2 Gas Flow Ratio in Plasma-Enhanced Chemical Vapor Deposition with SiH4–NH3–N2–He Gas Mixture on Stress Relaxation of Silicon Nitride
- Hydrogen Ion Drift into Underlying Oxides by RF Bias during High-Density Plasma Chemical Vapor Deposition
- Local Bonding Structure of High-Stress Silicon Nitride Film Modified by UV Curing for Strained Silicon Technology beyond 45 nm Node SoC Devices