Single Electron Charging Phenomena in Silicon Nano-Pillars With and Without Silicon Nitride Tunnel Barriers

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概要

• 論文の詳細を見る
• 2000-08-28

著者

• Ahmed H

  Univ. Cambridge Cambridge Gbr

• MIZUTA Hiroshi

  Hitachi Cambridge Laboratory

• NAKAZATO Kazuo

  Hitachi Cambridge Laboratory

• AHMED Haroon

  Microelectronics Research Centre, Cavendish Laboratory, University of Cambridge

• Mizuta H

  Hitachi Cambridge Laboratory:crest Jst (japan Science And Technology)

• Ahmed Haroon

  Microelectronics Research Center Cavendish Laboratory:crest Japan Science And Technology (jst)

• POOLEY David

  Microelectronics Research Centre, Cavendish Laboratory, Cambridge University

• Pooley David

  Microelectronics Research Centre Cavendish Laboratory Cambridge University

• Nakazato K

  Hitachi Cambridge Laboratory:crest Jst (japan Science And Technology)

• Nakazato Kazuo

  Hitachi Cambridge Lab. Hitachi Europe Cavendish Lab.

関連論文

• Fabrication of Free-Standing Single-Crystal Silicon Nanostructures for the Study of Thermal Transport and Defect Scattering in Low Dimensional Systems
• Characterization of Tunnel Barriers in Polycrystalline Silicon Point-Contact Single-Electron Transistors
• Carrier Transport across a Few Grain Boundaries in Highly Doped Polycrystalline Silicon : Electrical Properties of Condensed Matter
• Transport Properties and Fabrication of Coupled Electron Waveguides
• Magnetotransport in Hexagonal and Rectangular Antidot Lattices
• Single Electron Charging Phenomena in Silicon Nano-Pillars With and Without Silicon Nitride Tunnel Barriers
• Application of Focused Ion Beam Implantation to Produce Gallium Arsenide Metal Semiconductor Field-Effect Transistors with a Novel Doping Profile
• Dithiol-Linked Gold Colloidal Particles Used for Fabricating Single Electron Transistors
• Hybrid Circuit Simulator Including a Model for Single Electron Tunneling Devices
• Nanostructure Fabrication Based on Sporntaneous Formation Mechanisms
• Transport Properties of Two Quantum Dots Connected in Series Formed in Silicon Inversion Layers
• Fabrication of Lateral Tunnel Junctions and Measurement of Coulomb Blockade Effects
• A High-Speed, Silicon-Based Few-Electron Memory Gain Cell
• Polycrystalline Silicon Single-Electron Transistor with Gate-Dependent Two-Period Current Oscillations
• Performance of Silicon Based bi-directional Electron Pumps Consisting of Two Coulomb Blockade Devices
• Tunnel Barrier Formation in Silicon Nanowires
• Characteristics of Electron Pump Circuits Using Silicon Multiple Tunnel Junctions
• Single Atom Lithography and its Applications
• Characteristic of Electron Pumps Based on Silicon Coulomb Blockade Devices
• The Multiple-Tunnel Junction and Its Application to Single-Electron Memory and Logic Circuits
• Performance of Silicon Based Bi-Directional Electron Pumps Consisting of Two Coulomb Blockade Devices
• Simulation of the Effect of Emitter Doping on the Delay Time in AlGaAs/GaAs Heterojunction Bipolar Transistors
• Coulomb Blockade and Disorder in 2D Quantum Dot Arrays
• Turnstile Based Single-Electron Logic Devices
• Modelling of Structural and Threshold Voltage Characteristics of Randomly Doped Silicon Nanowires in the Coulomb-Blockade Regime : Semiconductors

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