Suppression of Stress-Induced Leakage Current of Wet and Dry SiO_2 by SiD_4 Poly-Si Gate Electrode
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概要
- 論文の詳細を見る
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2003-09-15
著者
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SATAKE Hideki
Advanced LSI Technology Laboratory Research & Development Center, Toshiba Co.
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Mitani Yuichiro
Advanced Lsi Technology Laboratory Toshiba Corporation
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Mitani Yuichiro
Advanced Lsi Technology Laboratory Corporate R&d Center Toshiba Corporation
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- Influences of initial bulk traps on Negative Bias Temperature Instability of HfSiON
- Exact Trap Level Estimation of HfSiON Films with Various Atomic Compositions
- Suppression of Stress-Induced Leakage Current of Wet and Dry SiO_2 by SiD_4 Poly-Si Gate Electrode
- Double Junction Tunnel using Si Nanocrystalline Layer for Nonvolatile Memory Devices
- Enhancement of Dielectric Constant due to Expansion of Lattice Spacing in CeO_2 Directly Grown on Si(111)
- Deuterium Effect on Both Interface-State Generation and Stress-Induced-Leakage-Current under Fowler-Nordheim Electron Injection
- A Study of the Effect of Deuterium on Stress-Induced Leakage Current
- Time Evolution of Mean and Dispersion in Si/SiO_2 Interface States Generation Statistics
- Method of Decoupling the Bias Temperature Instability Component from Hot Carrier Degradation in Ultrathin High-$k$ Metal–Oxide–Semiconductor Field-Effect Transistors
- Experimental Clarification of Hydrogen-related Mechanism in NBT Degradation
- Evidence of Electrical and Structural Evolution of Gate Dielectric Breakdown Observed by Conductive Atomic Force Microscopy
- Suppression of Stress-Induced Leakage Current of Wet and Dry SiO2 by SiD4 Poly-Si Gate Electrode
- Reconsideration of Hydrogen Release at Ultra Thin Gate Oxide Interface