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Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation | 論文
- Highly Selective Si_3N_4/SiOC Etching Using Dual Frequency Superimposed RF Capacitively Coupled Plasma
- Defects Induced by Carbon Contamination in Low-Temperature Epitaxial Silicon Films Grown with Monosilane
- Surface Channel Metal Gate Complementary MOS with Light Counter Doping and Single Work Function Gate Electrode
- Sub-1.3 nm Amorphous Tantalum Pentoxide Gate Dielectrics for Damascene Metal Gate Transistors
- Sub 1.3nm Amorphous Ta_2O_5 Gate Dielectrics for Damascene Metal Gate Transistor
- Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique
- Effects of Nitrogen Concentration and Post-treatment on Reliability of HfSiON Gate Dielectrics in Inversion States
- Low-Standby-Power Complementary Metal-Oxide-Semiconductor Transistors with TiN Single Gate on 1.8 nm Gate Oxide
- Novel Pb(Ti,Zr)O_3(PZT) Crystallization Technique Using Flash Lamp for Ferroelectric RAM (FeRAM) Embedded LSIs and One Transistor Type FeRAM Devices
- Novel PZT Crystallization Technique by Using Flash Lamp for FeRAM Embedded LSIs and 1Tr FeRAM Devices
- Micro-structure Transformation of Silicon : A Newly Developed Transformation Technology for Patternin Silicon Surfaces using the Surface Migration of Silico Atoms by Hydrogen Annealing
- Mechanism of Defect Formation during Low-Temperature Si Epitaxy on Clean Si Substrate
- Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping (VPD)
- Dominant Factor for the Concentration of Phosphorus Introduced by Vapor Phase Doping
- Determination of Band Alignment of Hafnium Silicon Oxynitride/Silicon (HfSiON/Si) Structures using Electron Spectroscopy
- Reduction in PN Junction Leakage for Ni-silicided Small Si Islands by Using Thermal Conduction Heating with Stacked Hot Plates
- Novel Elevated Source/Drain Technology for FinFET Overcoming Agglomeration and Facet Problems Utilizing Solid Phase Epitaxy
- Retarding Mechanism of Si Selective Epitaxial Growth on CMOS Structure due to Doped Arsenic in the Si Substrate
- Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow Shallow Trench Isolation
- Facet-Free Si Selective Epitaxial Growth Adaptable to Elevated Source/Drain MOSFETs with Narrow STI