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Advanced Device Development Dept. Renesas Technology Corp. | 論文
- Partially Depleted SOI Technology with Body-Tied Hybrid Trench Isolation for High-Speed System-On-a-Chip Application(Special Issue on Integrated Systems with New Concepts)
- Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs
- A Sub 1-V L-Band Low Noise Amplifier SOI CMOS(Special Section on Analog Circuit Techniques and Related Topics)
- A CAD-Compatible SOI-CMOS Gate Array Using 0.35 μm Partially-Depleted Transistors (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
- Analyses of the Radiation-Caused Characteristics Change in SOI MOSFETs Using Field Shield Isolation
- The Influence of the Buried Oxide Defects on the Gate Oxide Reliability and Drain Leakage Currents of the Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
- Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs
- Analysis of the Delay Distributions of 0.5μm SOI LSIs (Special Issue on SOI Devices and Their Process Technologies)
- Features of SOI DRAM's and their Potential for Low-Voltage and/or Giga-Bit Scale DRAM's (Special Issue on ULSI Memory Technology)
- Comparison of Standard and Low-Dose Separation-by-Implanted-Oxygen Substrates for 0.15 μm SOI MOSFET Applications
- High-Speed SOI 1/8 Frequency Divider Using Field-Shield Body-Fixed Structure
- Comparison of Standard and Low-Dose SIMOX Substrates for 0.15μm SOI MOSFET Applications
- Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect
- Suppression of Self-Heating in Hybrid Trench Isolated SOI MOSFETs with Poly-Si plug and W plug
- Impact of μA-ON-Current Gate-All-Around TFT (GAT) for Static RAM of 16Mb and beyond
- Impact of μ A-ON-Current Gate All-Around TFT (GAT) for 16MSRAM and Beyond
- A Single-Chip MPEG-2 422P@ML Video, Audio, and System Encoder with a 162MHz Media-processor Core and Dual Motion Estimation Cores
- An Embedded Software Scheme for a Real-Time Single-Chip MPEG-2 Encoder System with a VLIW Media Processor Core (Special Issue on Low-Power High-Performance VLSI Processors and Technologies)
- A Design of High-Speed 4-2 Compressor for Fast Multiplier (Special Issue on Ultra-High-Speed LSIs)
- Control of Carrier Collection Efficiency in n^+p Diode with Retrograde Well and Epitaxial Layers