Gate Voltage Reduction of a Ferroelectric Gate Field-Effect Transistor Memory with an Intermediate Electrode on Data-Reading
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概要
- 論文の詳細を見る
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2003-04-01
著者
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Horita Susumu
School Of Materials Science Japan Advanced Institute Of Science And Technology
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Khoa Tran
School Of Materials Science Japan Advanced Institute Of Science And Technology
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