Stable Readout Circuit for Ferroelectric Random Access Memory Using Complementary Metal–Oxide–Semiconductor-Inverter-Based Capacitive-Feedback Charge-Integration Scheme
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概要
- 論文の詳細を見る
A capacitive-feedback charge-integration circuit composed of a simple complementary metal–oxide–semiconductor (CMOS) inverter amplifier was applied to a stable readout operation of a low-power low-voltage ferroelectric random access memory (FeRAM). Plate-line driving voltage can be fully applied to a ferroelectric capacitor, and readout signal voltage is independent of bitline capacitance owing to the negative feedback effect. Fluctuations in CMOS inverter amplifier characteristics can be compensated for by an autozeroing mechanism. A CMOS inverter amplifier operating point shift induced by a charge injection mechanism is very effective for increasing signal voltage amplitude. The circuit configuration and operation of the proposed scheme are very simple. A test circuit was fabricated and its operation was confirmed by measurement. The compensation for the threshold voltage fluctuation and the low-power operation of the proposed circuit were also demonstrated by simulation.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2010-04-25
著者
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Kotani Koji
Department Of Electronic Engineering Graduate School Of Engineering Tohoku University
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Ito Takashi
Department Of Chemistry School Of Science The University Of Tokyo
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Koji Kotani
Department of Electronics, Graduate School of Engineering, Tohoku University, 6-6-05 Aza-Aoba, Aramaki, Aoba-ku, Sendai 980-8579, Japan
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Koshimoto Yohei
Department of Electronics, Graduate School of Engineering, Tohoku University, 6-6-05 Aza-Aoba, Aramaki, Aoba-ku, Sendai 980-8579, Japan
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Yohei Koshimoto
Department of Electronics, Graduate School of Engineering, Tohoku University, 6-6-05 Aza-Aoba, Aramaki, Aoba-ku, Sendai 980-8579, Japan
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ITO Takashi
Department of Advanced Materials Chemistry, Graduate School of Engineering, Yokohama National University
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