Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors
スポンサーリンク
概要
- 論文の詳細を見る
A surface-potential-based compact model for polycrystalline silicon (poly-Si) thin-film transistors (TFTs) was developed, accounting for the effects of both deep and tail states across the band gap. The model describes the drain current in all regions of operation using the unified equation without the use of threshold voltage as an input parameter. Calculations using the drain current model produce results that are in good agreement with the measured current–voltage characteristics of poly-Si TFTs.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2008-10-25
著者
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TSUJI HIROSHI
Division of Radiation Medicine, National Institute of Radiological Sciences
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Morifuji Masato
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Shimizu Yoshiyuki
Division Of Aging And Geriatric Dentistry Department Of Oral Function And Morphology Tohoku Universi
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Taniguchi Kenji
Division Of Electrical Electronic And Information Engineering Osaka University
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Shimizu Yoshiteru
Advanced LCD Technologies Development Center Co., Ltd., 292 Yoshida-cho, Totsuka-ku, Yokohama 244-0817, Japan
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Miyano Soichiro
Advanced LCD Technologies Development Center Co., Ltd., 292 Yoshida-cho, Totsuka-ku, Yokohama 244-0817, Japan
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Kamakura Yoshinari
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Taniguchi Kenji
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Kuzuoka Tsuyoshi
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Kishida Yuji
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Kirihara Masaharu
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Tsuji Hiroshi
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Shimizu Yoshiyuki
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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Morifuji Masato
Division of Electrical, Electronic and Information Engineering, Osaka University, Suita, Osaka 565-0871, Japan
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