A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition

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概要

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• Since many embedded applications involve intensive mathematic operations, floating-point arithmetic units (FPU) have paramount importance in embedded systems. However, previous implementations of FPU either require much manual work or only support special functions (e.g. reciprocal, square root, logarithm, etc.). In this paper, we present an automatic method to synthesize general FPU by aligned partition. Based on the novel partition algorithm and the concept of grouping floating-point numbers into zones, our method supports general functions of wide, irreducible domain. The synthesized FPU achieves smaller area, higher frequency, and greater accuracy. Experimental results show that our method achieves 1) on average 90% smaller and 50% faster indexer than the conventional automatic method; 2) on the hyperbolic functions, 20k times smaller error rate and 50% use of LUTs and flip-flops than the conventional manual design.

• Information and Media Technologies 編集運営会議の論文

著者

• Chen Song

  Graduate School Of Information Production And Systems Waseda University

• Nakamura Yuichi

  Nec Corp.

• Yoshimura Takeshi

  Graduate School of Engineering, Osaka Prefecture University, Department of Applied Materials Science, 1-1 Gakuen-cho, Sakai, Osaka 599-8531, Japan

• Ge Liangwei

  Graduate School of Information, Production and System, Waseda University

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