Redundant via Insertion : Removing Design Rule Conflicts and Balancing via Density
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概要
- 論文の詳細を見る
The occurrence of via defects increases due to the shrinking size in integrated circuit manufacturing. Redundant via insertion is an effective and recommended method to reduce the yield loss caused by via failures. In this paper, we introduce the redundant via allocation problem for layer partition-based redundant via insertion methods [1] and solve it using the genetic algorithm. At the same time, we use a convex-cost flow model to equilibrate the via density, which is good for the via density rules. The results of layer partition-based model depend on the partition and processing order of metal layers. Furthermore, even we try all of partitions and processing orders, we might miss the optimal solutions. By introducing the redundant via allocation problem on partitioning boundaries, we can avoid the sub-optimality of the original layer-partition based method. The experimental results show that the proposed method got 12 more redundant vias inserted on average and the via density balance can be greatly improved.
- (社)電子情報通信学会の論文
- 2010-12-01
著者
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Chen Song
Graduate School Of Ips Waseda University
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Chen Song
Graduate School Of Information Production And Systems Waseda University
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Yoshimura T
Ntt Docomo Inc. Yokohama‐shi Jpn
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Yoshimura Takeshi
Graduate School Of Ips Waseda University
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CHIANG Mei-Fang
Graduate School of IPS, Waseda University
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Yoshimura Takeshi
Graduate School Of Fisheries Sciences Hokkaido University
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Shen Jianwei
Graduate School Of Ips Waseda University
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Guo Wei
Graduate School Of Ips Waseda University
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Chiang Mei-fang
Graduate School Of Ips Waseda University
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Chen Song
The Graduate School Of Information Production And Systems Waseda University
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Yoshimura Takeshi
Graduate School of Engineering, Osaka Prefecture University, Department of Applied Materials Science, 1-1 Gakuen-cho, Sakai, Osaka 599-8531, Japan
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