Max-Flow Scheduling in High-Level Synthesis(VLSI Design Technology and CAD)
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概要
- 論文の詳細を見る
Scheduling, an essential step in high-level synthesis, is an intractable process. Traditional heuristic scheduling methods usually search schedules directly in the entire solution space. In this paper, we propose the idea of searching within an intermediate solution space (ISS). We put forward a max-flow scheduling method that heuristically prunes the solution space into a specific ISS and finds the optimum of ISS in polynomial time. The proposed scheduling algorithm has some unique features, such as the correction of previous scheduling decisions in a later stage, the simultaneous scheduling of all the operations, and the optimization of more complicated objectives. Aided by the max-flow scheduling method, we implement the optimization of the IC power-ground integrity problem at the behavior level conveniently. Experiments on well-known benchmarks show that without requiring additional resources or prolonging schedule latency, the proposed scheduling method can find a schedule that draws current more stably from a supply, which mitigates the voltage fluctuation in the on-chip power distribution network.
- 社団法人電子情報通信学会の論文
- 2007-09-01
著者
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Takenaka Takashi
Nec Corporation
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Chen Song
Graduate School Of Ips Waseda University
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Chen Song
Graduate School Of Information Production And Systems Waseda University
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Yoshimura T
Ntt Docomo Inc. Yokohama‐shi Jpn
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Yoshimura Takeshi
Graduate School Of Ips Waseda University
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GE Liangwei
Graduate School of IPS, Waseda University
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GE Liangwei
Waseda University
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CHEN Song
Waseda University
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WAKABAYASHI Kazutoshi
NEC Corporation
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YOSHIMURA Takeshi
Waseda University
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Yoshimura Takeshi
Waseda Univ.
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Ge Liangwei
Graduate School Of Ips Waseda University
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Wakabayashi Kazutoshi
Nec Corp. Central Research Labs Eda R&d Center
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Chen Song
The Graduate School Of Information Production And Systems Waseda University
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