Max-Flow Scheduling in High Level Synthesis

スポンサーリンク

概要

• 論文の詳細を見る

• Scheduling in essence is a process of finding a matching between operations and control steps in the bipartite graph. In this paper, we improve the bipartite matching by proposing the idea of removing overlapped control steps, which avoids the violation of data dependency and prunes the search space for scheduler. Based on this idea, we further present a max-flow scheduling algorithm that provides flexibility to optimize multiple objectives and supports early planning for later tasks in the synthesis process. Moreover, our algorithm can schedule operations from multiple paths simultaneously at a single step and provides theoretical guarantee to find the optimal matching between operations and control steps. Experiments on the well-know benchmarks in literature show positive results.

• 社団法人電子情報通信学会の論文
• 2005-11-03

著者

• GE Liangwei

  Waseda University

• YOSHIMURA Takeshi

  Waseda University

• Yoshimura Takeshi

  Waseda Univ.

• Isoda Kouhei

  Waseda University

関連論文

• Max-Flow Scheduling in High-Level Synthesis(VLSI Design Technology and CAD)
• An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs(Logic Synthesis, VLSI Design and CAD Algorithms)
• Timing Optimization Methodology Based on Replacing Flip-Flops by Latches(Logic Synthesis)(VLSI Design and CAD Algorithms)
• Max-Flow Scheduling in High Level Synthesis
• Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs(Simulation and Verification,VLSI Design and CAD Algorithms)
• Max-Flow Scheduling in High Level Synthesis

スポンサーリンク