Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis
スポンサーリンク
概要
- 論文の詳細を見る
In this work, we focus on the problem of latency-constrained scheduling with consideration of multiple voltage technologies in Highlevel synthesis. Without the resource concern, we propose an Integer Linear Programming (ILP) formulation and further relax it to a piecewise Linear Programming (LP) problem, which is optimally solved using the efficient piecewise-linear extended network simplex method (PLNSM). The experimental results showed 80X+ speedup compared to the general LP formulation. Considering the resource usage, we propose a two-stage heuristic Network Simplex Method based Power-efficient Multiple Voltage Scheduling (NPMVS) method. Firstly, the above relaxed LP formulation is modified to perform mobility allocation and delay assignment for the operations so as to minimize the power and the differences between the allocated operation mobilities and the predefined target mobilities. The modified formulation is solved using the PLNSM and iteratively performed to minimize power and resource density variation in control steps by gradually updating the predefined target mobilities. Secondly, with the allocated operation mobilities, we apply dependency- free operation scheduling with the objective of minimizing the resource usage. Experimental results show that the proposed method can produce optimum solutions for all 6 benchmarks with 14 groups of data in a maximum time of 0.25 second.
- 2013-02-25
著者
-
Chen Song
Graduate School Of Information Production And Systems Waseda University
-
Yoshimura Takeshi
Graduate School of Engineering, Osaka Prefecture University, Department of Applied Materials Science, 1-1 Gakuen-cho, Sakai, Osaka 599-8531, Japan
-
Chen Song
Graduate School of IPS, Waseda University:Dept. 23, University of Science and Technology of China
-
Hao Cong
Graduate School of IPS, Waseda University
-
Hao Cong
Graduate School of IPS, Waseda University:Dept. Computer Science, Shanghai Jiaotong University
関連論文
- Structure and morphology of aminopropyltriethoxysilane-modified TiO_2 nano-particles derived from sol-gel processing of tetraethylorthotitanate
- Novel One-pot Sol-Gel Preparation of Amino-functionalized Silica Nanoparticles
- Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs
- Max-Flow Scheduling in High-Level Synthesis(VLSI Design Technology and CAD)
- Score Sequence Pair Problems of (r_, r_, r_)-Tournaments : Determination of Realizability(Graph Algorithms,Foundations of Computer Science)
- Nutrient Regeneration at Bottom after a Massive Spring Bloom in a Subarctic Coastal Environment, Funka Bay, Japan
- Voltage and Level-Shifter Assignment Driven Floorplanning
- A-3-3 A Multilevel Fixed-outline Floorplanning for Large-scale IC Design
- Effects of Oxygen Annealing on Dielectric Properties of LuFeCuO4
- Redundant via Insertion : Removing Design Rule Conflicts and Balancing via Density
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Floorplanning for High Utilization of Heterogeneous FPGAs
- Novel Voltage Choice and Min-Cut Based Assignment for Dual-VDD System
- Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips
- Pulsed-Laser-Deposited YMnO3 Epitaxial Films with Square Polarization-Electric Field Hysteresis Loop and Low-Temperature Growth
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips
- Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs
- Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis
- Exploration of Schedule Space by Random Walk
- A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition