A Relocation Method for Circuit Modifications(Circuit Synthesis,<Special Section>VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
In this paper, we propose a novel migration method. In this method, the resultant placement retains the structure of the original placement, called model placement, as much as possible. For this purpose, we minimize the sum of the difference in area between the model placement and the relocated one and the total amount of displacement between them. Moreover, to achieve a short runtime, we limit the solution space and change the packing origin in the optimization process. We construct the system on Sequence-Pair. Experimental results show that our approach preserves the chip area and the overall circuit structure with 98% less runtime than that realized by naive simulated annealing.
- 社団法人電子情報通信学会の論文
- 2007-12-01
著者
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TAKASHIMA Yasuhiro
Department of Pediatrics, Kobe University School of Medicine
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NAKAMURA Yuichi
NEC Corporation
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Takashima Yasuhiro
Department Of Information And Media The University Of Kitakyushu
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Yanagibashi Kunihiko
Department Of Information And Media The University Of Kitakyushu
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Nakamura Yuichi
Nec Corp.
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