Multiple-Valued Static Random-Access-Memory Design and Application : Special Issue on Multiple-Valued integrated Circuits
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概要
- 論文の詳細を見る
In this paper, a general theory on multiple-valued static random-access-memory (RAM) is investigated. A criterion for a stable and an unstable modes is proved with a strict mathematical method and expressed with a diagrammatic representation. Based on the theory, an NMOS 6-transistor ternary and a quaternary static RAM (SRAM) cells are proposed and simulated with PSPICE. The detail circuit design and realization are analyzed. A 10-valued CMOS current-mode static RAM cell is also presented and fabricated with standard 5-μm CMOS technology. A family of multiple-valued flip-flops is presented and they show to have desirable properties for use in multiple-valued sequential circuits. Both PSPICE simulations and experiments indicate that the general theory presented are very useful and effective tools in the optimum design and circuit realization of multiple-valued static RAMs and flip-flops.
- 社団法人電子情報通信学会の論文
- 1993-03-25
著者
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TANG Zheng
Faculty of Engineering, Toyama University
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ISHIZUKA Okihiko
Faculty of Engineering, Miyazaki University
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Tang Zheng
Faculty Of Engineering Miyazaki University
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ISHIZUKA Okihiko
Miyazaki University
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Ishizuka Okihiko
The Faculty Of Engineering Miyazaki University
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Ishizuka Okihiko
Faculty Of Engineering Miyazaki University
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Matsumoto Hiroki
Faculty of Engineering, Miyazaki University
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