Wide Input-Range Four-Quadrant Analog Multiplier Using Floating-Gate MOSFET's(Analog Signal Processing)

概要

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In this paper, we present a new analog multiplier with wide input range which is achieved by utilizing the variable threshold voltage characteristics of FG-MOSFET's. The performance of the proposed multiplier is evaluated through HSPICE simulation with 2.0μm CMOS process parameters. From HSPICE simulation, we can find that the proposed multiplier can be operated at the supply voltage of 3.0V with 3.0V_<p-p> input range. Namely, the input voltage range of the multiplier is equal to the supply voltage. The maximum power consumption of the multiplier is 8.8mW. The THD is 1.36% under the condition that the amplitude of the input signal is 3.0V_<p-p> and the frequency is 1MHz. Under the same condition, the linearity error is less than 0.5%. The -3dB bandwidth of the proposed multiplier is 23 MHz.
社団法人電子情報通信学会の論文
2003-07-01