A High-Speed Binary to Residue Converter Using a Signed-Digit Number Representation

概要

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In this letter, we propose high-speed binary to residue converters for moduli 2^n,2^n ± 1 without using look-up table. For integration of residue arithmetic circuit using a signed-digit (SD) number representation with ordinary binary system, the proposed circuits carry out the efficient conversion. Using SD adders instead of ordinary adders that are used in conventional binary to residue converter, the high-speed conversion without the carry propagation can he achieved. Thus, the proposed converter is independent of the size of modulus and can speed up the binary to residue conversion. On the simulation, the conversion delay times are 1.78 ns for modulus 2^<10> - 1 and 1.73 ns for modulus 2^<10> + 1 under the condition of 0.6 μm CMOS technology, respectively. The active area of the proposed converter for moduli 2^<10> ± 1 is 335 μm×325 μm.
2002-05-01