A New Hardware/Software Partitioning Algorithm for DSP Processor Cores with Two Types of Register Files(Special Section on VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
This letter propose a hardware/software partitioning algorithm for digital signal processor cores with two register files. Given a compiled assembly code and a timing constraint of execution time, the proposed algorithm generates a processor core configuration with a new assembly code running on the generated processor core. The proposed algorithm considers two register files and determines the number of registers in each of register files. Moreover the algorithm considers two or more types of functional units for each arithmetic or logical operation and assigns functional units with small area to a processor core without causing performance penalty. A generated processor core will have small area compared with processor cores which have a single register file or those which consider only one type of functional units for each operation. The experimental results demonstrate the effectiveness and efficiency of the proposed algorithm.
- 社団法人電子情報通信学会の論文
- 2001-11-01
著者
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Togawa N
Univ. Kitakyushu Kitakyushu‐shi Jpn
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Togawa Nozomu
The Dept. Of Computer Science Waseda University
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Togawa Nozomu
The Department Of Electronics Information And Communication Engineering Waseda University
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OHTSUKI Tatsuo
the Department of Electronics, Information and Communication Engineering, Waseda University
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Yanagisawa M
The Dept. Of Computer Science Waseda University
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Yanagisawa Masao
Department Of Computer Science Waseda University
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YANAGISAWA Masao
the Department of Electronics, Information and Communication Engineering, Waseda University
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SAKURAI Takashi
the Department of Electronics, Information and Communication Engineering, Waseda University
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Ohtsuki Tatsuo
Department Of Computer Science And Engineering Waseda University
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Ohtsuki Tatsuo
The Department Of Electronics And Communication Engineering School Of Science And Engineering Waseda
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Yanagisawa Masao
The Department Of Electronics Information And Communication Engineering Waseda University
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Ohtsuki Tomoaki
The Department Of Electrical Engineering Science University Of Tokyo
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Ohtsuki T
Department Of Electrical Engineering Tokyo University Of Science
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Sakurai T
The Department Of Electronics Information And Communication Engineering Waseda University:(present A
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Masao Yanagisawa
School of Fundamental Science and Engineering Waseda University
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YANAGISAWA Masao
the Department of Electronic and Photonic Systems, Waseda University
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TOGAWA Nozomu
the Department of Computer Science and Engineering, Waseda University
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