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Renesas Technology Corp. | 論文
- Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
- Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance(Interconnect, VLSI Design and CAD Algorithms)
- A Voltage Scalable Advanced DFM RAM with Accelerated Screening for Low Power SoC Platform(Next-Generation Memory for SoC,VLSI Technology toward Frontiers of New Market)
- Thermal Gain Variation Compensation Technique Using Thermistor on HPA Module for W-CDMA System
- Application of High Quality Built-in Test Using Neighborhood Pattern Generator to Industrial Designs(Test)(VLSI Design and CAD Algorithms)
- Attacking Method on Tanaka's Scheme
- A Low-Power Microcontroller with Body-Tied SOI Technology(Low-Power System LSI, IP and Related Technologies)
- 1-GHz Input Bandwidth Under-Sampling A/D Converter with Dynamic Current Reduction Comparator for UWB-IR Receiver
- Investigations of Optimum Tier Architectures for ASICs(VLSI Design Technology and CAD)
- A 3.2-mA 6-Bit Pipelined A/D Coverter for a Bluetooth RF Transceiver(Special Issue on High-Performance Analog Integrated Circuits)
- A 10-bit 3-Msample/s CMOS Multipath Multibit Cyclic ADC (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
- A Novel False Lock Detection Technique for a Wide Frequency Range Delay-Locked Loop( Analog Circuit Techniques and Related Topics)
- Dependence of Time-Dependent Dielectric Breakdown Lifetime on NH_3-Plasma Treatment in Cu Interconnects
- Dielectric Breakdown and Light Emission in Copper Damascene Structure under Bias-Temperature Stress
- Design and Experimental Results of CMOS Low-Noise/Driver MMIC Amplifiers for Use in 2.4-GHz and 5.2-GHz Wireless Communications
- 2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply(Special Section on Analog Circuit Techniques and Related Topics)
- A New Broadband Buffer Circuit Technique and Its Application to a 10-Gbit/s Decision Circuit Using Production-Level 0.5μm GaAs MESFETs
- Delay Library Generation with High Efficiency and Accuracy on the Basis of RSM (Special lssue on SISPAD'99)
- A Flexible Search Managing Circuitry for High-Density Dynamic CAMs (Speial Section on High Speed and High Density Multi Functional LSI Memories)
- A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories (Special Issue on LSI Memories)