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Inter-University Semiconductor Research Center (ISRC) | 論文
- Investigation of Threshold Voltage Disturbance Caused by Programmed Adjacent Cell in Virtual Source/Drain NAND Flash Memory
- Implementation of Channel Thermal Noise Model in CMOS RFIC Design(Session8A: Si Devices III)
- Implementation of Channel Thermal Noise Model in CMOS RFIC Design(Session8A: Si Devices III)
- Fin and Recess-Channel Metal Oxide Semiconductor Field Effect Transistor for Sub-50 nm Dynamic Random Access Memory Cell
- Program/Erase Model of Nitride-Based NAND-Type Charge Trap Flash Memories
- Room-Temperature Operation of a Single-Electron Transistor Made by Oxidation Process Using the Recessed Channel Structure
- Dual Gate Single-Electron Transistors with a Recessed Channel and Underlapped Source/Drain Structure
- Fabrication of Highly Scaled Silicon Nanowire Gate-All-Around Metal–Oxide–Semiconductor Field Effect Transistors by Using Self-Aligned Local-Channel V-gate by Optical Lithography Process
- Random Telegraph Signal-Like Fluctuation Created by Fowler–Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor
- Extraction of Interface-States Energy Distribution in Nitrided and Pure Gate Dielectrics for Metal Oxide Semiconductor Field Effect Transistor Applications
- Accurate Extraction of Excess Channel Thermal Noise Coefficient in Berkeley Short-Channel Insulated Gate Field-Effect Transistor Model 4
- Dynamic driving current using side gate bias of single-electron transistors
- Extraction of Electron Band Mobility in Amorphous Silicon Thin-Film Transistors
- Design of Thin-Body Double-Gated Vertical-Channel Tunneling Field-Effect Transistors for Ultralow-Power Logic Circuits
- A Compact Model for Channel Coupling in Sub-30 nm NAND Flash Memory Device
- Electrically Stable Organic Thin-Film Transistors and Circuits Using Organic/Inorganic Double-Layer Insulator
- Self-Aligned Asymmetric Metal–Oxide–Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator
- Capacitorless Dynamic Random Access Memory Cell with Highly Scalable Surrounding Gate Structure
- Novel Gate-All-Around Metal–Oxide–Semiconductor Field Effect Transistors with Self-Aligned Structure
- On the Characteristics and Spatial Dependence of Channel Thermal Noise in Nanoscale Metal–Oixde–Semiconductor Field Effect Transistors