Sugiyama Naoharu | MIRAI Project, Association of Super-Advanced Electronics Technology (ASET), 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan

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著作論文

Deformation Induced Holes in Ge-Rich SiGe-on-Insulator and Ge-on-Insulator Substrates Fabricated by Ge Condensation Process
High Mobility Fully-Depleted Germanium-on-Insulator pMOSFET with 32-nm-Thick Ge Channel Layer Formed by Ge-Condensation Technique
Performance Enhancement under High-Temperature Operation and Physical Origin of Mobility Characteristics in Ge-rich strained SiGe-on-Insulator pMOSFETs
Impact of Gradual Source/Drain Impurity Profiles on Performance of Germanium Channel Double-Gated pMISFETs
High mobility Ge channel metal source/drain pMOSFETs with nickel fully silicided gate
Quantitative Evaluation of Interface Trap Density in Ge-MIS Interfaces
Modulation of NiGe/Ge Schottky Barrier Height by Dopant and Sulfur Segregation during Ni Germanidation for Metal S/D Ge MOSFETs
Single Source Heterojunction Metal--Oxide--Semiconductor Transistors for Quasi-Ballistic Devices: Optimization of Source Heterostructures and Electron Velocity Characteristics at Low Temperature
Variation of Threshold Voltage in Strained Si Metal–Oxide–Semiconductor Field-Effect Transistors Induced by Non-uniform Strain Distribution in Strained-Si Channels on Silicon–Germanium-on-Insulator Substrates
Analysis of Microstructures in SiGe Buffer Layers on Silicon-on-Insulator Substrates
Evaluation of Dislocation Density of SiGe-on-Insulator Substrates using Enhanced Secco Etching Method

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