Kameyama M | Graduate School Of Information Sciences Tohoku University
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概要
関連著者
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Kameyama M
Graduate School Of Information Sciences Tohoku University
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Hariyama M
Graduate School Of Information Sciences Tohoku University
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Hariyama Masanori
The Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku
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Hariyama Masanori
Graduate School Of Information Sciences Tohoku University
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Kameyama Michitaka
Graduate School Of Information Science Tohoku University
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Waidyasooriya Hasitha
Graduate School Of Information Sciences Tohoku University
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Kameyama Michitaka
Graduate School of Information Sciences, Tohoku University
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HARIYAMA Masanori
Graduate School of Information Sciences, Tohoku University
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Lee Seunghwan
The Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku
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KAMEYAMA Michitaka
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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Kameyama Michitaka
Tohoku Univ. Sendai‐shi Jpn
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CHONG Weisheng
Tohoku University
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Kameyama Michitaka
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Chong Weisheng
東北大学大学院情報科学研究科
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Kimura Hiromitsu
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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HANYU Takahiro
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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Kimura H
Ntt Access Network Service Systems Laboratories
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Hanyu T
Tohoku Univ. Sendai‐shi Jpn
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CHONG Weisheng
Graduate School of Information Sciences, Tohoku University
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LEE Seunghwan
the Department of computer and Mathematical Sciences, Graduate School of Information Sciences, Tohok
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KAMEYAMA Michitaka
the Department of computer and Mathematical Sciences, Graduate School of Information Sciences, Tohok
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WAIDYASOORIYA Hasitha
Tohoku University
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HARIYAMA Masanori
Tohoku University
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Hanyu Takahiro
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Kimura Hiromitsu
Department Of Chemistry Graduate School Of Science Tohoku University
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Hariyama Masanori
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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LEE Seunghwan
Graduate School of Information Sciences, Tohoku University
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LEE Seunghwan
the Graduate School of Information Sciences, Tohoku University
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HARIYAMA Masanori
the Graduate School of Information Sciences, Tohoku University
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KAMEYAMA Michitaka
the Graduate School of Information Sciences, Tohoku University
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Kameyama Michitaka
The Graduate School Of Information Sciences And Also With The Faculty Of Engineering Tohoku Universi
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OKUMURA Daisuke
Graduate School of Information Sciences, Tohoku University
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Okumura Daisuke
Graduate School Of Information Sciences Tohoku University
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Ohbayashi Yosuke
Graduate School Of Information Sciences Tohoku University
著作論文
- Implementation of a DRAM-Cell-Based Multiple-Valued Logic-in-Memory Circuit
- Dynamic-Storage-Based Logic-in-Memory Circuit and Its Application to a Fine-Grain Pipelined System(Special Issue on High-Performance and Low-Power Microprocessors)
- Low-Power Field-Programmable VLSI Using Multiple Supply Voltages(Low Power Methodology, VLSI Design and CAD Algorithms)
- Field-Programmable VLSI Based on a Bit-Serial Fine-Grain Architecture(New System Paradigms for Integrated Electronics)
- Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme
- An FPGA-Oriented Motion-Stereo Processor with a Simple Interconnection Network for Parallel Memory Access
- Architecture of a high-performance stereo vision VLSI processor
- Collision Detection VLSI Processor for Highly-Safe Intelligent Vehicles Using a Multiport Content-Addressable Memory
- A Three-Dimensional Instrumentation VLSI Processor Based on a Concurrent Memory-Access Scheme
- Implementation of a Partially Reconfigurable Multi-Context FPGA Based on Asynchronous Architecture
- Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using Multiple Supply and Threshold Voltages
- Multi-Context FPGA Using Fine-Grained Interconnection Blocks and Its CAD Environment
- Memory Allocation for Window-Based Image Processing on Multiple Memory Modules with Simple Addressing Functions
- Task Allocation with Algorithm Transformation for Reducing Data-Transfer Bottlenecks in Heterogeneous Multi-Core Processors : A Case Study of HOG Descriptor Computation
- Memory-Access-Driven Context Partitioning for Window-Based Image Processing on Heterogeneous Multicore Processors