Hanyu Takahiro | Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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概要
- HANYU Takahiroの詳細を見る
- 同名の論文著者
- Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univの論文著者
関連著者
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HANYU Takahiro
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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KAMEYAMA Michitaka
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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Kameyama Michitaka
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Hanyu Takahiro
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Hanyu T
Tohoku Univ. Sendai‐shi Jpn
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Kimura Hiromitsu
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Kimura H
Ntt Access Network Service Systems Laboratories
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Kameyama M
Graduate School Of Information Sciences Tohoku University
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Kimura Hiromitsu
Department Of Chemistry Graduate School Of Science Tohoku University
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Deng Xiaowei
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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KAZAMA Satoshi
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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Deng Xiaowei
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Kazama S
Electromagnetic Compatibility Res. Lab. Co. Ltd.
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Kameyama Michitaka
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Kameyama Michitaka
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Hanyu Takahiro
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
著作論文
- Implementation of a DRAM-Cell-Based Multiple-Valued Logic-in-Memory Circuit
- Dynamic-Storage-Based Logic-in-Memory Circuit and Its Application to a Fine-Grain Pipelined System(Special Issue on High-Performance and Low-Power Microprocessors)
- Quantum-Device-Oriented Multiple-Valued Logic System Based on a Super Pass Gate
- Multiple-Valued Logic-in-Memory VLSI Architecture Based on Floating-Gate-MOS Pass-Transistor Logic (Special Issue on Integrated Electronics and New System Paradigms)
- Design and Implementation of a Low-Power Multiple-Valued Current-Mode Integrated Circuit with Current-Source Control (Special Issue on New Concept Device and Novel Architecture LSIs)