Dynamic-Storage-Based Logic-in-Memory Circuit and Its Application to a Fine-Grain Pipelined System(<特集>Special Issue on High-Performance and Low-Power Microprocessors)
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概要
- 論文の詳細を見る
A new logic-in-memory circuit is proposed for a fine-grain pipelined VLSI system. Dynamic-storage elements are distributed over a logic-circuit plane. A functional pass gate is a key component, where a linear summation and threshold function are merged compactly using charge-storage and chargecoupling effect with a DRAM-cell-based circuit structure. The use of dynamic logic based on pass-transistor network using functional pass gates makes it possible to realize any logic circuits compactly with small power dissipation. As a typical example, a 54-bit pipelined multiplier is implemented by using the proposed circuit technology. Its power dissipation and chip area are reduced to about 63 percent and 72 percent, respectively, in comparison with those of a corresponding binary CMOS implementation under 0.35-μm CMOS technology.
- 社団法人電子情報通信学会の論文
- 2002-02-01
著者
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Kimura Hiromitsu
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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HANYU Takahiro
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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KAMEYAMA Michitaka
Department of Computer and Mathematical Sciences, Graduate School of Information Sciences, Tohoku Un
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Kimura H
Ntt Access Network Service Systems Laboratories
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Hanyu T
Tohoku Univ. Sendai‐shi Jpn
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Kameyama M
Graduate School Of Information Sciences Tohoku University
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Kameyama Michitaka
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Hanyu Takahiro
Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku Univ
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Kimura Hiromitsu
Department Of Chemistry Graduate School Of Science Tohoku University
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