Waidyasooriya Hasitha | Graduate School Of Information Sciences Tohoku University
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概要
- WAIDYASOORIYA Hasitha Muthumalaの詳細を見る
- 同名の論文著者
- Graduate School Of Information Sciences Tohoku Universityの論文著者
関連著者
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Waidyasooriya Hasitha
Graduate School Of Information Sciences Tohoku University
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Hariyama Masanori
Graduate School Of Information Sciences Tohoku University
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Kameyama Michitaka
Graduate School Of Information Science Tohoku University
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Kameyama M
Graduate School Of Information Sciences Tohoku University
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Hariyama M
Graduate School Of Information Sciences Tohoku University
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Hariyama Masanori
The Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku
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Kameyama Michitaka
Tohoku Univ. Sendai‐shi Jpn
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TAKEI Yasuhiro
Graduate School of Information Sciences, Tohoku University
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Kameyama Michitaka
Graduate School of Information Sciences, Tohoku University
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HARIYAMA Masanori
Graduate School of Information Sciences, Tohoku University
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WAIDYASOORIYA Hasitha
Tohoku University
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HARIYAMA Masanori
Tohoku University
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Uchiyama Kunio
Central Research Laboratory Hitachi Ltd.
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CHONG Weisheng
Tohoku University
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Chong Weisheng
東北大学大学院情報科学研究科
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OKUMURA Daisuke
Graduate School of Information Sciences, Tohoku University
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Okumura Daisuke
Graduate School Of Information Sciences Tohoku University
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Hiramatsu Yoshitaka
Central Research Laboratory Hitachi Ltd.
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Ohbayashi Yosuke
Graduate School Of Information Sciences Tohoku University
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WAIDYASOORIYA Hasitha
Graduate School of Information Sciences, Tohoku University
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NOJIRI Toru
Central Research Laboratory, Hitachi, Ltd.
著作論文
- Implementation of a Partially Reconfigurable Multi-Context FPGA Based on Asynchronous Architecture
- Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using Multiple Supply and Threshold Voltages
- Multi-Context FPGA Using Fine-Grained Interconnection Blocks and Its CAD Environment
- Memory Allocation for Window-Based Image Processing on Multiple Memory Modules with Simple Addressing Functions
- Task Allocation with Algorithm Transformation for Reducing Data-Transfer Bottlenecks in Heterogeneous Multi-Core Processors : A Case Study of HOG Descriptor Computation
- Memory-Access-Driven Context Partitioning for Window-Based Image Processing on Heterogeneous Multicore Processors
- Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation
- Platform and Mapping Methodology for Heterogeneous Multicore Processors
- Evaluation of an FPGA-Based Heterogeneous Multicore Platform with SIMD/MIMD Custom Accelerators
- Platform and Mapping Methodology for Heterogeneous Multicore Processors ( Fundamental Aspects and Recent Developments in Multimedia and VLSI Systems)