Heyns Marc | Interuniversity Microelectronics Centre
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概要
関連著者
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Heyns Marc
Interuniversity Microelectronics Centre
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Heyns Marc
Interuniversitary Micro-Electronics Center
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HEYNS Marc
IMEC
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Mertens P
Interuniversity Microelectronics Center
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Heyns M
Interuniv. Microelectronics Center Leuven Bel
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Heyns M
Imec Leuven Bel
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MERTENS Paul
Interuniversitair Micro-Electronica Centrum
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BEARDA Twan
Interuniversitary Micro-Electronics Center
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WOERLEE Pierre
University of Twente
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Bearda T
Interuniv. Microelectronics Center Leuven Bel
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Mertens Paul
Interuniversity Microelectronics Center
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Degraeve Robin
Imec
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Depas Michel
Imec Vzw
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Nigam Tanya
Imec
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GROESENEKEN Guido
IMEC
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DEPAS Michel
Interuniversity Microelectronics Centre
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SCHMOLKE Rudiger
Wacker Siltronic AG
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WALLINGA Hans
University of Twente
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Schmolke R
Wacker Siltronic Ag
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Depas Michel
IMEC
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Verhaverbeke S
Imec Kapeldreef
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Alay Josep-lluis
Imec Kapeldreef : Lcmm Universitat De Barcelona
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SCHMOLKE Rudiger
Interuniversity Microelectronics Center
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ALAY Josep-Lluis
IMEC, Kapeldreef
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VERHAVERBEKE Steven
IMEC, Kapeldreef
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VANDERVORST Wilfried
IMEC, Kapeldreef
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HEYNS Marc
IMEC, Kapeldreef
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DEGRAEVE Robin
Interuniversity Microelectronics Centre
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NIGAM Tanya
Interuniversity Microelectronics Centre
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GROESENEKEN Guido
Interuniversity Microelectronics Centre
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Vandervorst W
Insys Leuven Bel
著作論文
- Current-Voltage Characteristics of Gate Oxides after Hard Breakdown
- Morphology Change of Artificial Crystal Originated Particles, and the Effect on Gate Oxide Integrity
- Breakdown and Recovery of Thin Gate Oxides
- Fabrication and Characterization of Artificial Crystal Originated Particles
- Critical Parameters for Obtaining Low Particle Densities on a Si Surface in an HF-Last Process
- Gate Voltage Dependence of Reliability for Ultra-Thin Oxides
- Reliability of Ultra-Thin Gate Oxide Below 3 nm in the Direct Tunneling Regime
- Reliability of Ultra-Thin Gate Oxides Below 3nm in the Direct Tunneling Regime