INOUE Yasuaki | Waseda University

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概要

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著作論文

Determination of Interconnect Structural Parameters for Best-and Worst-Case Delays(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance(Interconnect, VLSI Design and CAD Algorithms)
An Effective Pseudo-transient Algorithm for Finding DC Operating Points of Nonlinear Circuits
A New High-Speed Low-Voltage Charge Pump for PLL Applications
A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills(VLSI Design Technology and CAD)
A PN Junction-Current Model for Advanced MOSFET Technologies
AS-2-1 A 45nm Stable Dynamic Standby Mode SRAM for Leakage Power Suppression
An Efficient Homotopy Method for Solving Nonlinear Circiuts
A GIDL-Current Model for Advanced MOSFET Technologies without Binning

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