AS-2-1 A 45nm Stable Dynamic Standby Mode SRAM for Leakage Power Suppression

スポンサーリンク

概要

• 論文の詳細を見る
• 社団法人電子情報通信学会の論文
• 2008-03-05

著者

• HUANG Zhangcai

  Waseda University

• INOUE Yasuaki

  Waseda University

• Huang Zhangcai

  Waseda Univ. Kitakyushu‐shi Jpn

• HUANG Sui

  Waseda University

関連論文

• Determination of Interconnect Structural Parameters for Best-and Worst-Case Delays(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
• Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
• Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance(Interconnect, VLSI Design and CAD Algorithms)
• An Effective Pseudo-transient Algorithm for Finding DC Operating Points of Nonlinear Circuits
• A New High-Speed Low-Voltage Charge Pump for PLL Applications
• A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills(VLSI Design Technology and CAD)
• A PN Junction-Current Model for Advanced MOSFET Technologies
• AS-2-1 A 45nm Stable Dynamic Standby Mode SRAM for Leakage Power Suppression
• An Efficient Homotopy Method for Solving Nonlinear Circiuts
• A GIDL-Current Model for Advanced MOSFET Technologies without Binning

スポンサーリンク