Inoue Michiko | Nara Inst. Sci. And Technol. (naist) Ikoma‐shi Jpn
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概要
関連著者
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Inoue Michiko
Nara Inst. Sci. And Technol. (naist) Ikoma‐shi Jpn
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Inoue Michiko
Nara Institute Of Science And Technology:japan Science And Technology Agency Crest
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Fujiwara Hideo
Nara Inst. Of Sci. And Technol. (naist) Ikoma‐shi Jpn
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FUJIWARA Hideo
Nara Institute of Science and Technology (NAIST)
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Fujiwara H
The Authors Are With The Nara Institute Of Science And Technology (naist)
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Singh Virendra
The Authors Are With The Nara Institute Of Science And Technology (naist)
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Inoue Michiko
The Authors Are With The Nara Institute Of Science And Technology (naist)
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SALUJA Kewal
University of Wisconsin-Madison
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SALUJA Kewal
The author is with the University of Wisconsin-Madison
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Singh Virendra
Nara Institute of Science & Technology
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Saluja K
Department Of Electrical And Computer Engineering University Of Wisconsin-madison
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Ohtake Satoshi
Nara Institute Of Science And Technology (naist)
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Ohtake Satoshi
Nara Institute of Science and Technology
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Ohtake Satoshi
Nara Institute Of Science And Technology:japan Science And Technology Agency Crest
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Fujiwara Hideo
Computer Design And Test Lab Nara Institute Of Science And Technology
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Fujiwara Hideo
Nara Institute Of Science And Technology:japan Science And Technology Agency Crest
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Yoneda Tomokazu
Nara Inst. Sci. And Technol. (naist) Ikoma‐shi Jpn
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Fujiwara Hideo
Nara Inst. Sci. And Technol. (naist) Ikoma‐shi Jpn
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Fujiwara Hideo
University of Wisconsin - Madison, U.S.A
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YOSHIKAWA YUKI
Nara Institute of Science and Technology
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Yoneda Tomokazu
Nara Institute Of Science And Technology
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HATAYAMA Kazumi
Nara Institute of Science and Technology
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YONEDA Tomokazu
Nara Institute of Science and Technology (NAIST)
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NAKAZATO Masato
Nara Institute of Science and Technology (NAIST)
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FJIWARA Hideo
Nara Institute of Science & Technology
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Yoshikawa Yuki
Graduate School Of Information Science Nara Institute Of Science And Technology
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Inoue Michiko
Nara Institute of Science and Technology:Japan Science and Technology Agency, CREST
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YAMATO Yuta
Nara Institute of Science and Technology:Japan Science and Technology Agency, CREST
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HATAYAMA Kazumi
Nara Institute of Science and Technology:Japan Science and Technology Agency, CREST
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YONEDA Tomokazu
Nara Institute of Science and Technology:Japan Science and Technology Agency, CREST
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Inoue Michiko
Nara Institute of Science and Technology
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YAMATO Yuta
Nara Institute of Science and Technology
著作論文
- D-10-18 An Approach to Temperature Control During VLSI Test
- Design for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors
- Non-scan Design for Single-Port-Change Delay Fault Testability (特集:システムLSI設計とその技術)
- Program-Based Delay Fault Self-Testing of Processor Cores
- Program-Based Delay Fault Self-Testing of Processor Cores (デザインガイア2003--VLSI設計の新しい大地を考える研究会)
- Program-Based Delay Fault Self-Testing of Processor Cores (デザインガイア2003--VLSI設計の新しい大地を考える研究会)
- Program-Based Delay Fault Self-Testing of Processor Cores (デザインガイア2003--VLSI設計の新しい大地を考える研究会)
- Program-Based Delay Fault Self-Testing of Processor Cores
- On Per-Cell Dynamic IR-Drop Estimation in At-Speed Scan Testing
- Non-scan Design for Single-Port-Change Delay Fault Testability
- On Per-Cell Dynamic IR-Drop Estimation in At-Speed Scan Testing