Park H‐j | Pohang Univ. Sci. And Technol. Kyungbuk Kor

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概要

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著作論文

A Low-Power Half-Swing Clocking Scheme for Flip-Flop with Complementary Gate and Source Drive
Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit (Special Issue on Integrated Electronics and New System Paradigms)
A Temperature- and Supply-Insensitive Fully On-Chip 1Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs
Two-Phase Boosted Voltage Generator for Low-Voltage Giga-Bit DRAMs
A Decision Feedback Equalizing Receiver for the SSTL SDRAM Interface with Clock-Data Skew Compensation(Integrated Electronics)
An Analytic Time Jitter Equation of NRZ Signals in Uniformly Loaded PCB Transmission Lines
Fully On-Chip Current Controlled Open-Drain Output Driver for High-Bandwidth DRAMs
An 8-GS/s 4-Bit 340 mW CMOS Time Interleaved Flash Analog-to-Digital Converter(Analog Circuit Techniques and Related Topics)
An 8-Bit 200MS/s CMOS Folding/Interpolating Analog-to-Digital Converter
Adaptive Biasing Folded Cascode CMOS OP Amp with Continuous-Time Push-Pull CMFB Scheme
A Temperature-Insensitive Current Controlled CMOS Output Driver

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