Park Sang‐hune | Pohang University Of Science And Technology (postech)
スポンサーリンク
概要
関連著者
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Park S‐h
Tokyo Inst. Technol. Tokyo Jpn
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PARK Sang-Hune
Pohang University of Science and Technology (POSTECH)
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Park Sang‐hune
Pohang University Of Science And Technology (postech)
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Park Se-hyun
Department Of Electrical And Electronic Tokyo Institute Of Technology
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Park Hong‐june
Pohang University Of Science And Technology (postech)
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Jang Young-chan
Samsung Electronics
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SIM Jae-Yoon
Pohang University of Science and Technology (POSTECH)
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PARK Hong
Pohang University of Science and Technology (POSTECH)
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Park H‐j
Pohang Univ. Sci. And Technol. Kyungbuk Kor
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Park Hong-june
Pohang University Of Science And Technology (postech)
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Park Hong-june
Vlsi Systems Laboratory Pohang University Of Science And Technology (postech)
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Sim Jae‐yoon
Pohang University Of Science And Technology (postech)
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Park H‐j
Pohang Univ. Sci. And Technol. (postech) Kor
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BAE Jun-Hyun
Pohang University of Science and Technology (POSTECH)
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Park Hong-june
Department Of Electrical Engineering Pohang University Of Science And Technology
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Hirokawa J
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Ando M
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Ando Makoto
The Authors Are With The Department Of Electrical And Electronic Engineering Tokyo Institute Of Tech
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Heo Seung-chan
Rf Design Project System Lsi Samsung Electronics Company
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HIROKAWA Jiro
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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ANDO Makoto
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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PARK Seung-Ho
Imaging Systems Laboratory, Department of Electrical Engineering, Inha University
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KIM Choon-Woo
Imaging Systems Laboratory, Department of Electrical Engineering, Inha University
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PARK Hong-June
IC Laboratory, Pohang University of Science and Technology(POSTECH)
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Kim Choon-woo
Imaging Systems Laboratory Department Of Electrical Engineering Inha University
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Hirokawa Jiro
Department Of Electrical & Electronic Engineering Faculty Of Engineering Tokyo Institute Of Tech
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HIROKAWA Jiro
the Department of Electrical and Electronic Engineering, Ando & Hirokawa Lab., Tokyo Institute of Te
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ANDO Makoto
the Department of Electrical and Electronic Engineering, Ando & Hirokawa Lab., Tokyo Institute of Te
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JANG Young-Chan
IC Lab., Department of Electronic Engineering, Pohang University of Science and Technology (POSTECH)
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PARK Sang-Hune
IC Lab., Department of Electronic Engineering, Pohang University of Science and Technology (POSTECH)
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HEO Seung-Chan
The authors are with High-Speed CMOS IC Lab., Department of Electrical Engineering. Pohang Universit
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JANG Young
The authors are with High-Speed CMOS IC Lab., Department of Electrical Engineering. Pohang Universit
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PARK Sang-Hune
The authors are with High-Speed CMOS IC Lab., Department of Electrical Engineering. Pohang Universit
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PARK Hong-June
The authors are with High-Speed CMOS IC Lab., Department of Electrical Engineering. Pohang Universit
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PARK Se-Hyun
Department of Electrical and Electronic, Tokyo Institute of Technology
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PARK Se-Hyun
the Department of Electrical and Electronic, Tokyo Institute of Technology
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Ando Makoto
Department Of Cardiovascular Surgery The Sakakibara Heart Institute
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Ando Makoto
Department Of Cardiovascular Surgery Sakakibara Heart Institute
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Ando Makoto
Department Of Applied Physics Faculty Of Engineering Tokyo University Of Agriculture And Technology
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Ando Makoto
The Department Of Cardiovascular Surgery Seirei Hamamatsu General Hospital
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PARK Hong-June
IC Lab., Department of Electronic Engineering, Pohang University of Science and Technology (POSTECH)
著作論文
- A Digital Differential Transmitter with Pseudo-LVDS Output Driver and Digital Mismatch Calibration
- An Optimum Selection of Subfield Pattern for Plasma Displays Based on Genetic Algorithm(Special Issue on Electronic Displays)
- An 8-GS/s 4-Bit 340 mW CMOS Time Interleaved Flash Analog-to-Digital Converter(Analog Circuit Techniques and Related Topics)
- An 8-Bit 200MS/s CMOS Folding/Interpolating Analog-to-Digital Converter
- An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator(Analog Circuits and Related SoC Integration Technologies)
- Simple Analysis of a Slot and a Reflection-Canceling Post in a Rectangular Waveguide Using only the Axial Uniform Currents on the Post Surface(Antenna and Propagation)
- A Planar Cross-Junction Power Divider for the Center Feed in Single-Layer Slotted Waveguide Arrays(Regular Section)