Efficient Algorithms for Extracting Pareto-optimal Hardware Configurations in DEPS Framework
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概要
- 論文の詳細を見る
A dynamic energy performance scaling (DEPS) framework has been proposed as a generalization of dynamic voltage frequency scaling (DVFS). The DEPS framework selects an energy-optimal hardware configuration at runtime. To reduce runtime overhead, Pareto-optimal combinations of hardware configurations should be provided via DEPS profiling during the design phase. The challenge of DEPS profiling lies in extracting the Pareto-optimal combinations efficiently from the exponential search space. We propose two exact algorithms to reduce the number of calculations in DEPS profiling. These algorithms can be used with common search algorithms. We also propose a heuristic algorithm for searching Pareto-optimal configurations efficiently. Extensive experiments are performed, and they demonstrate that the proposed algorithms can complete DEPS profiling within a reasonable amount of time and generate optimal DEPS profiles. It is believed that the proposed algorithms will enable easy application of the DEPS framework in practice.
- 一般社団法人 情報処理学会の論文
著者
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Zeng Gang
Graduate School Of Information Science Nagoya University
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TAKASE Hideki
Graduate Student, Osaka University
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Takada Hiroaki
Graduate School Of Information Science Nagoya University
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Kawashima Hirotaka
Graduate School Of Science And Technology Kumamoto University
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Edahiro Masato
Graduate School of Information Science, Nagoya University
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Zeng Gang
Graduate School of Engineering, Nagoya University
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Kawashima Hirotaka
Graduate School of Information Science, Nagoya University
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Takase Hideki
Graduate School of Information Science, Nagoya University
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