自律故障補償可能なハードウェアニューロンのバックワードパス演算部の設計

概要

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In neural network, there is a problem that learning time becomes so long for real world problems. To achieve fast learning, some researchers proposed to implement a neural network into a Wafer Scale Integration (WSI). WSI uses one wafer as a parallel computer, a part of defect leads entire system fault. Therefore a defect compensation method is necessary to implement a neural network into WSI. Partial Retraining (PR) scheme has proposed as one of the defect compensation methods for neural networks. However, PR scheme is not verified whether it will perform good on hardware devices or not. It is also not clear how much is circuit required. In our laboratory, we have been finished a design of forward-pass module of self-defect-compensatable hardware neuron. In this paper, we report a design of backward-pass module, and evaluate the performance of our design by simulations.
2010-09-30