0.2 μm Hole Pattern Generation by Critical Dimension Biassing Using Resin Overcoat
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概要
- 論文の詳細を見る
A method of generating very small hole patterns by introduction of transfer bias into a resist pattern after original resist pattern generation has been developed and evaluated. Introduction of transfer bias was carried out using a resin overcoating and strippig process and a novolak resist pattern was used as the original hole pattern. The overcoating resin used was polymethylmethacrylate (PMMA) and transfer bias was introduced by intermixing of novolak resin and PMMA during the PMMA baking step. From scanning electron microscope (SEM) observation, it appeared that 0.20 μm hole pattern generation was possible by i-line lithography. The amount of undersize was controllable by PMMA bake temperature, and 0.06-0.15 μm undersize could be achieved by using a bake temperature range of 60-120℃. From results of etching SiO_2 substrate using overcoat treated hole pattern, it appeared that the mixinglayer functioned as an etching mask for oxide film.
- 社団法人応用物理学会の論文
- 1995-12-30
著者
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Taino Mitsuhiko
Kek High Energy Accelerator Research Organization
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MATSUI Tetsuyuki
Department of Physical Science, Graduate School of Engineering Science, Osaka University
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Matsui Toshiaki
Communication Research Laboratory Ministry Of Posts And Telecommunications
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Matsui T
Department Of Systems Innovation Graduate School Of Engineering Science Osaka University
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Kanamori J
Vlsi Research And Development Center Oki Electric Industry Co. Ltd.
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Yamauchi Takahiro
V-lsi R&d Center Oki Electric Co. Ltd.
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MATSUI Takayuki
V-LSI R&D Center, Oki Electric Co., Ltd.
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KANAMORI Jun
V-LSI R&D Center, Oki Electric Co., Ltd.
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MIYAKAWA Yasuhiro
V-LSI R&D Center, Oki Electric Co., Ltd.
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SHIMOYAMA Kouhei
V-LSI R&D Center, Oki Electric Co., Ltd.
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Takasaki Minoru
Kek High Energy Accelerator Research Organization
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Shimoyama Kouhei
V-lsi R&d Center Oki Electric Co. Ltd.
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Miyakawa Yasuhiro
Vlsi Research And Development Center Oki Electric Industry Co. Ltd.
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