Design Optimization of VLSI Array Processor Architecture for Window Image Processing (Special Section on Digital Signal Processing)
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概要
- 論文の詳細を見る
In this paper, we present a novel architecture named as Window-MSPA architecture which targets to window operations in image processing. We have previously developed a Memory Sharing Processor Array (MSPA) for fast array processing with regular iterative algorithms. Window-MSPA tries to optimize the data I/O ports and the number of processing elements so as to reduce hardware cost. The input scheme of image data is restricted to row by row input which simplifies the I/O architecture. Under this practical I/O restriction, the fastest processings are achieved. In this paper, we present the general Window-MSPA design methodology for wide variety of applications. As an practical application, we have already reported the design of MP@HL MPEG2 Motion Estimator LSI. Design formulas for Window-MSPA architecture are given for various size of window operations in image processing. Thus, the derived architecture is flexible enough to satisfy user's requirement for either area or speed.
- 社団法人電子情報通信学会の論文
- 1999-08-25
著者
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Kunieda H
Department Of Communication And Integrated System Tokyo Institute Of Technology
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Kunieda Hiroaki
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Kunieda H
Tokyo Inst. Technol. Tokyo Jpn
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Kunieda Hiroaki
Department Of Communications And Integrated Systems Tokyo Institute Of Technology
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Kunieda H
Tokyo Inst. Of Technol. Tokyo Jpn
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Jiang Li
Department of Molecular Pathology, Institute of Gerontology, Nippon Medical School
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Jiang L
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Jiang Li
Department Of Molecular Pathology Institute Of Gerontology Nippon Medical School
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LI Dongju
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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Li Dongju
Department Of Communications And Integrated Systems Tokyo Institute Of Technology
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Li D
Tokyo Inst. Technol. Tokyo Jpn
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Jiang Li
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Li Dongju
Department Of Communication And Integrated System School Of Science And Engineering Tokyo Institute Of Technology
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Kunieda Hiroaki
Department Of Communication And Integrated System School Of Science And Engineering Tokyo Institute Of Technology
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Jiang Li
Department of Applied Physics and Materials Research Centre, The Hong Kong Polytechnic University, Hong Kong, P. R. China
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