Routability Analysis of Bit-Serial Pipeline Datapaths (Special Section on VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
In this paper, we will show some significant results of the routability analysis of bit-serial pipeline datapath designs based on Rent's rule [1] and Donath's [10] observation. Our results show that all of the tested bit-serial benchmarks have Rent exponent of below 0.4, indicating that the average wiring length of the circuit is expected to be independent of the circuit size. This study provides some important implications on the silicon utilization and time-area efficiency of bit-serial pipeline circuits on FPGAs and ASICs.
- 社団法人電子情報通信学会の論文
- 1997-10-25
著者
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Kunieda Hiroaki
The Department Of Electrical And Electronics Engineering Tokyo Institute Of Technology
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Kunieda H
Tokyo Inst. Technol. Tokyo Jpn
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ISSHIKI Tsuyoshi
the Department of Electrical and Electronics Engineering, Tokyo Institute of Technology
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DAI Wayne
University of California
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Isshiki T
Tokyo Inst. Of Technol. Tokyo Jpn
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Isshiki Tsuyoshi
The Department Of Electrical And Electronics Engineering Tokyo Institute Of Technology
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