混載DRAM用低温BST-CVDキャパシタ開発
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概要
- 論文の詳細を見る
- 2002-06-06
著者
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Okuno Yasutoshi
Lsi Manufacturing Technology Unit Wafer Process Engineering Development Division Renesas Technology
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森 義弘
松下電器産業(株)
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Okuno Y
Lsi Manufacturing Technology Unit Wafer Process Engineering Development Division Renesas Technology
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森 義弘
松下電器産業
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奥野 泰利
日本テキサスインスツルメンツ(株)、ulsi技術開発センター
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奥野 泰利
松下電器産業(株)
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皷谷 昭彦
松下電器産業(株)
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小川 久
松下電器産業(株)
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皷谷 昭彦
松下電器産業
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Okuno Yasutoshi
ULSI Process Technology Development Center, Semiconductor Company, Matsushita Electronics Corp., 19, Nishikujo-kasuga cho, Minami-ku, Kyoto 601-8413, Japan
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- 混載DRAM用低温BST-CVDキャパシタ開発
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