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Toshiba Corporation Semiconductor Company | 論文
- Unoccupied Electronic State of Delafossite-Type PdCoO_2 Single Crystal Probed Using Inverse Photoemission Spectroscopy
- Issues of Mixed-Signal Circuit Design in 90nm CMOS LSI Technology
- Single Low 2.4-V Supply Operation GaAs Power MESFET Amplifier with Low-Distortion Gain-Variable Attenuator for 1.9-GHz PHS Applications(Special Issue on Microwave and Millimeter-Wave Module Technology)
- A 2-V Operation Resonant-Type T/R-Switch with Low Distortion Characteristics for 1.9-GHz PHS(Special Issue on Microwave and Millimeter-Wave Module Technology)
- Sub-1.3 nm Amorphous Tantalum Pentoxide Gate Dielectrics for Damascene Metal Gate Transistors
- Sub 1.3nm Amorphous Ta_2O_5 Gate Dielectrics for Damascene Metal Gate Transistor
- Highly Uniform Low-Pressure Chemical Vapor Deposition (LP-CVD) of Si_3N_4 Film on Tungsten for Advanced Low-Resistivity "Polymetal" Gate Interconnects
- Plasma-Damage-Free Gate Process Using Chemical Mechanical Polishing for 0.1 μm MOSFETs
- Plasma Damage Free Gate Process Using CMP for 0.1um MOSFETs
- Ultrashallow Junction Formation for Sub-100nm Complementary Metal-Oxide-Semiconductor Field-Effect Transistor by Controlling Transient Enhanced Diffusion
- Improved Ti Self-Aligned Silicide Technology Using High Dose Ge Pre-Amorphization for 0.10 μm CMOS and Beyond
- Large CP Violation in B_s Decays and Light W_R : Particles and Fields
- Light W_R and the Spontaneous CP Violation : Particles and Fields
- Reduction in PN Junction Leakage for Ni-silicided Small Si Islands by Using Thermal Conduction Heating with Stacked Hot Plates
- A 38% Tuning Range 6-GHz Fully Integrated VCO(Special Issue on High-Performance Analog Integrated Circuits)
- High-Performance Low-k Dielectric Using Advanced EB-Cure Process
- Low Leakage TiO_2 Gate Insulator Formed by Ultrathin TiN Deposition and Low-Temperature Oxidation
- Reliable High-k TiO_2 Gate Insulator Formed by Ultrathin TiN Deposition and Low Temperature Oxidation
- Aluminum-Graded-Base PNp AlGaAs/GaAs Heterojunction Transistor with 37 GHz Cut-Off Frequency (Special Issue on Ultra-High-Speed LSIs)
- Novel Elevated Source/Drain Technology for FinFET Overcoming Agglomeration and Facet Problems Utilizing Solid Phase Epitaxy