Narrow Width and Length Dependence of SiGe and Sallow-Trench-Isolation Stress Induced Defects in 45 nm p-Type Metal–Oxide–Semiconductor Field-Effect Transistors with Strained SiGe Source/Drain

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概要

• 論文の詳細を見る

• The effects of mechanical stress induced by both a strained SiGe source/drain (S/D) and shallow-trench-isolation (STI) on interface states in 45 nm p-type metal–oxide–semiconductor field-effect transistors (PMOSFETs) were studied in detail. An improved low gate-leakage gated-diode measurement was applied to the investigation of total induced defects. As channel width was scaled down, total defect density decreased markedly with decreasing channel length to a value less than 0.24 μm. It was opposite to the increase with decreasing channel length in conventional deep-submicron devices without SiGe S/D. The mechanism was also analyzed and proven by technology computer aided design package (T-CAD) simulations.

• 2009-04-25

著者

• Fang Yean-kuen

  Institute Of Microelectronics National Cheng Kung University

• HSIEH Jang-Cheng

  Taiwan Memory Technology Inc.

• SHEU Yi-Ming

  Taiwan Semiconductor Manufacturing Company

• Hsieh Jang-Cheng

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Cheng Chung-Yun

  Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, No. 1 University Road, Tainan 701, Taiwan

• Hsia Harry

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Chen Wei-Ming

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Lin Shyue-Shyh

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Hou Chin-Shan

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Sheu Yi-Ming

  Taiwan Semiconductor Manufacturing Company, 8 Li-Hsin Rd 6, Hsinchu Science Park, Hsinchu 300, Taiwan

• Fang Yean-Kuen

  Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, No. 1 University Road, Tainan 701, Taiwan

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• Impacts of Layout Dimensions and Ambient Temperatures on Silicon Based On-Chip RF Interconnects
• Efficient Mobility Enhancement Engineering on 65 nm Fully Silicide Complementary Metal–Oxide–Semiconductor Field-Effect-Transistors Using Second Contect Etch Stop Layer Process
• Narrow Width and Length Dependence of SiGe and Sallow-Trench-Isolation Stress Induced Defects in 45 nm p-Type Metal–Oxide–Semiconductor Field-Effect Transistors with Strained SiGe Source/Drain
• Stress Technology Impact on Device Performances and Reliability for $\langle100\rangle$ Sub-90 nm Silicon-on-Insulator Complementary Metal–Oxide–Semiconductor Field-Effect-Transistors
• Width Effect on Hot-Carrier-Induced Degradation for 90 nm Partially Depleted SOI CMOSFETs
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